Japanese Patent Application Laid-Open Publication No. 2014-67880 (Patent Document 1) discloses a technique for improving a connection reliability of a semiconductor chip and a metal plate by sufficiently ensuring a thickness of a conductive material interposed between the semiconductor chip and the metal plate. Specifically, the Patent Document 1 discloses that a lead frame is disposed on a jig and a clip frame is disposed on a projection part provided in the jig. Thus, according to the technique disclosed in the Patent Document 1, it is possible to secure a sufficient space between the semiconductor chip and the metal plate.